The 74595 is an 8-bit serial-in/parallel-out shift register with a storage register and 3-state outputs. It allows serial data input and expands the number of output pins using only three microcontroller lines. Controlled by a clock and latch pin, it can daisy-chain with others for more outputs. It's commonly used in LED displays and digital control circuits for efficient GPIO expansion.
| Supply Voltage | 2V to 6V |
|---|---|
| Max Output Current per Pin | ±35 mA |
| Clock Frequency (Max) | 100 MHz (at 5V) |
| Operating Temperature | -40°C to +85°C |
| Propagation Delay | 8 ns |
📄 SN74HC595 datasheet (2732 kB)
| Pin No | Pin Name | Description |
|---|---|---|
| 1 | Q1 | Parallel data output (bit-1) |
| 2 | Q2 | Parallel data output (bit-2) |
| 3 | Q3 | Parallel data output (bit-3) |
| 4 | Q4 | Parallel data output (bit-4) |
| 5 | Q5 | Parallel data output (bit-5) |
| 6 | Q6 | Parallel data output (bit-6) |
| 7 | Q7 | Parallel data output (bit-7) |
| 8 | GND | Ground |
| 9 | Q7S (also QH´) | Serial output ("overflow bit") which can be connected to the DS of another shift register. This is where the data ends up if more than 8 bits are shifted into the register. |
| 10 | MR (also: CLEAR or SRCLR) | Master Reclear (active low): Resets the entire chip |
| 11 | SHCP (also: SRCLK) | Shift Register Clock Pin: On a rising edge (LOW to HIGH), the bit on DS is shifted one position further into the register. |
| 12 | STCP (also: RCLK) | Storage Register Clock Pin: On a rising edge (LOW to HIGH), the contents of the shift register are transferred to the storage register (output register). The corresponding signal is then present on pins Q0–Q7. |
| 13 | OE | Output Enable (active low): Enables or disables outputs 0–7 |
| 14 | DS (also: SER) | Serial data input |
| 15 | Q0 | Parallel data output (bit-0) |
| 16 | VCC | Power supply |